1. Field of the Invention
The present invention relates to a semiconductor device, and more particularly, to a chip on film (COF) package comprising test lines for testing the electrical function of the internally formed chip terminals and a method for manufacturing the COF package.
2. Description of Related Art
As electronic devices employing a liquid crystal device (LCD) become thinner and smaller, integrated circuit (IC) packages for LCDs are required to have a larger amount of input/output terminals to perform various functions, while at the same time becoming thinner. A tape carrier package (TCP) technique for manufacturing an integrated circuit (IC) having a tape-shaped package has been developed to meet such requirements.
TCP comprises a tape automated bonding (TAB) package and a chip on film (COF) package. TAB package technique comprises coating an adhesive on a tape (which is used for a base film), and adhering a copper (Cu) foil to the tape by using the adhesive. The adhered Cu foil is then wired according to a designed pattern, and a lead wired on the tape is connected to a chip. Because TAB packages are thinner and have improved flexibility, they are typically used in various electronic devices such as laptop computers (notebook computers), mobile phones, watches, and measuring instruments and apparatuses.
A COF package technique provides an improvement over the TAB package technique. For instance, since the thickness of a polyimide tape of COF package is 25 μm, the COF package has more flexibility than the TAB package having the polyimide tape of 75 μm. Further, since passive elements such as resistors and capacitors can be mounted on the COF package, the size of an external printed circuit board (PCB) can be reduced. That is, the COF packages mount the passive elements thereon, thereby improving noise properties and minimizing the number of terminals of a connector for connecting to the external PCB.
However, a conventional COF package has a disadvantage in that the number of terminals to be tested is limited. For instance, several terminals of a semiconductor chip device are integrated into one terminal through capacitors and resistors and are connected to an external PCB. On the other hand, the electrical function testing of the COF package is performed by using the terminals of the connector connected to the external. PCB. Thus, many terminals internally formed in a COF package cannot be tested for electrical function. As a result, it is difficult for a conventional COF package to test electrical function on each pad of a chip.